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Preliminary
M61531FP
6ch Electronic Volume with 10 Input Selectors
REJ03F0050-0110Z Rev.1.1 Jun.01.2004
Features
Functions Electric volume Input selector Multi channel input Tone Control Features 6 channel independent electric volume with high voltage transistor (0 to -99 dB/1 dB step, - dB) L/R channel 10 input selector All channel 2 input selector (1) Bass: -16 to +16 dB (2 dB step), Treble: -10 to +10 dB (2 dB step) (2) Tone block position is selectable (3) Tone input ATT (0/-6/-12/-18 dB) Built-in loudness circuit of center tap type in L/Rch 4 Lines REC output (Both L and R channels) Input ATT (for ADC: 0/-6/-12/-18 dB) Input gain control (0/+6/+12/+18 dB) Output gain control (0/+6/+12/+18 dB) Built-in balance out (for ADC) 3 wire control, 3 to 5V I/F support
Loudness REC output Input ATT Input gain control Output gain control Balance out Bus control
Application
* Receiver, AV Amp, Mini Stereo etc.
Recommended Operating Condition
* Supply voltage range: AVCC = 7.0 V (Typ.), AVEE = -7.0 V (Typ.), DVDD = 2.7 to 5.5 V
System Block Diagram
CLOCK
Input Gain Control
DVDD AVEE AVCC REC OUTL DGND
Multi Rin
Multi Lin
1 2 3 4 Lch 5 6 7 8 9 10 1 2 3 4 Rch 5 6 7 8 9 10
Tone Input ATT Tone
Tone Block Positionis selectable.
MCU I/F
Bass&Treble
Tone
Output Gain Control
LATCH DATA
Rev.1.1, Jun.01.2004, page 1 of 19
10 Input selector 10 Input selector
Input ATT (for ADC) REC OUTR
Bass&Treble
Input Gain Control Output Gain Control
Lout
Bass&Treble Bass&Treble
Rout
Tone Input ATT Input ATT (for ADC)
Loud L
Multi SLin Balance Out L(+) Multi SR in Loud L / Balance Out L(-) Multi Cin Balance Out R(+) Multi Loud R / SWin Balance Out R(-)
Input Gain Control Output Gain Control Input Gain Control Output Gain Control Input Gain Control Output Gain Control Input Gain Control Output Gain Control
SLout
SRout
Cout
SWout
Loud R
GND
M61531FP
Preliminary
Block Diagram and Pin Configuration (Top View)
33 SWSELOUT 39 SLSELOUT 38 CSELOUT
35 SWOUT
27 CLOCK
34 SWVIN
29 LATCH
Cch
SWch
Output Gain Control
SLOUT 41
SLch
GND AVCC DVDD
25 SWIN2
26 DGND
40 SLVIN
36 COUT
30 DVDD
31 AVCC
28 DATA
37 CVIN
32 GND
SROUT 42 SRch SRVIN 43 SRSELOUT 44 RSELOUT 45 RVIN 46 ROUT 47 TRE R 48 BASS R2 49 BASS R1 50
Tone(Bass,Treble)
Output Gain Control
24 CIN2 23 SLIN2 22 SRIN2 21 RIN2 20 LIN2
Cch VOL
SWch VOL
MCU I/F
Input Gain Control
LA TCH DATA CLK
Multi Input Selector
SLch VOL
Output Gain Control Input Gain Control Input Gain Control
SWch
Cch
Multi Input S elector
Rch
Output Gain Control
GND Rch
-1
19 GND 18 /BALANCE R/- 17 BALANCE R/+ 16 GND 15 /BALANCE L/- 14 BALANCE L/+ 13 GND 12 RIN1 11 LIN1 10 SLIN1
LOUD L LOUD R
SLch R2
Multi Input Selector
SRch VOL
Loudness tap
Loud /Balance
Loudness tap
Rch VOL
Output Gain Control
Bypass/Tone
R2
Input Gain Control
Tone Input ATT
Input Gain Control
SRch
Multi Input Selector L/R VOL Input
GND Lch
-1
Rch
BASS L1 51 BASS L2 52 TRE L 53 LOUT 54 LVIN 55 LSELOUT 56 GND 57 RECL1 58 RECR1 59
GND Lch
R1
Tone Block Po sition
L2
Loud /Balance
Loudness tap
R3 L3
Rch GND
L/R VOL Input
Tone Block Po sition
Lch
L1
Output Gain Control
Tone Input ATT Bypass/Tone
Lch
Input Gain Control
Bypass/Tone
L1 L3 Input ATT Lch
Lch VOL
Loudness tap
L2
9 SRIN1 8 SWIN1
R3
R1
Bypass/Tone
7 CIN1
GND
Input ATT Rch
6 GND 5 INR1/EXT INR
RECL2 60 RECR2 61 RECL3 62 RECR3 63
GND
Bypass Se lector
4 INL1/EXT INL 3 INR2 2 INL2
Lch
Rch
GND 64
AVEE
1 INR3
INR9 69 INL8 70 INR8 71 INL7 72 INR7 73 INL6 74 INR6 75 INL5 76 INR5 77 INL4 78 INR4 79 INL3 80
INL10/RECL4 65
INR10/RECR4 66
AVEE 67
Rev.1.1, Jun.01.2004, page 2 of 19
INL9 68
M61531FP
Preliminary
Pin Description
Pin No. 3, 1, 79, 77, 75, 73, 71, 69 2, 80, 78, 76, 74, 72, 70, 68 4 5 6, 13, 16, 19, 32, 57, 64 7, 24 8, 25 9, 22 10, 23 11, 20 12, 21 14, 17 15, 18 26 27, 28, 29 30 31 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 51, 52, 50, 49 53, 48 54 55 56 58, 60, 62/59, 61, 63 65 66 67 Pin Name INR2, 3, 4, 5, 6, 7, 8, 9 INL2, 3, 4, 5, 6, 7, 8, 9 INL1/EXT INL INR1/EXT INR GND CIN1/CIN2 SWIN1/SWIN2 SRIN1/SRIN2 SLIN1/SLIN2 LIN1/LIN2 RIN1/RIN2 BALANCE L/+, R/+ LOUD L/BALANCE L/-, LOUD R/BALANCE R/- DGND CLOCK, DATA, LATCH DVDD AVCC SWSELOUT SWVIN SWOUT COUT CVIN CSELOUT SLSELOUT SLVIN SLOUT SROUT SRVIN SRSELOUT RSELOUT RVIN ROUT BASS L1, L2/BASS R1, R2 TRE L/TRE R LOUT LVIN LSELOUT REC L1, L2, L3 /REC R1, R2, R3 INL10/REC L4 INR10/REC R4 AVEE Function Input pin of R channel (Input Selector) Input pin of L channel (Input Selector)
Input pin of L channel (Input Selector)/External Input pin(Lch) Input pin of L channel (Input Selector)/External Input pin(Rch)
Analog Ground Input pin of C channel (2 Input Selector) Input pin of SW channel (2 Input Selector) Input pin of SR channel (2 Input Selector) Input pin of SL channel (2 Input Selector) Input pin of L channel (2 Input Selector) Input pin of R channel (2 Input Selector) Output pin of L/R channel Balance Output(+) Frequency characteristic setting pin of Loudness /Output pin of L/R channel Balance Output(-) Ground of internal logic circuit Input pin of control clock /data/ trigger Power supply to internal logic circuit Positive power supply to internal analog circuit Output pin of SW channel volume input selector Input pin of SW channel volume Output pin of SW channel Output pin of C channel Input pin of C channel volume Output pin of C channel volume input selector Output pin of SL channel volume input selector Input pin of SL channel volume Output pin of SL channel Output pin of SR channel Input pin of SR channel volume Output pin of SR channel volume input selector Output pin of R channel volume input selector Input pin of R channel volume Output pin of R channel
Frequency characteristic setting pin of tone control (BASS) Frequency characteristic setting pin of tone control (TREBLE)
Output pin of L channel Input pin of L channel volume Output pin of L channel volume input selector Output pin of REC (Lch and Rch)
Input pin of L channel (Input Selector)/Output pin of REC (Lch) Input pin of R channel (Input Selector)/Output pin of REC (Rch)
Negative power supply to internal analog circuit
Rev.1.1, Jun.01.2004, page 3 of 19
M61531FP
Preliminary
Absolute Maximum Ratings
Item Power supply Power dissipation Thermal derating Operating temperature Storage temperature Symbol Supply voltage Pd K Topr Tstg Ratings 8.0 6.0 1250 12.5 -20 to +55 -40 to +125 Unit V mW mW/C C C Test Condition AVCC-AVEE DVDD-GND Ta 25C Ta > 25C
Thermal Deratings (Maximum Rating) 1.5
Power Dissipation Pd (W)
1.0
0.5
0 0 25
55
50
75
100
125
150
Ambient Temperature Ta (C)
Recommended Operating Conditions
(Ta = 25C, unless otherwise noted)
Item Analog supply voltage (Positive) Analog supply voltage (Negative) Digital supply voltage Logic "H" level input voltage Logic "L" level input voltage Symbol AVCC AVEE DVDD VIH VIL Min. 4.5 -7.5 2.7 DVDD x 0.7 DGND Typ. 7.0 -7.0 3.3 -- -- Max. 7.5 -4.5 5.5 DVDD DVDD x 0.2 Unit V V V V V DGND reference DGND reference Test Condition
Note: AVEE DGND < DVDD AVCC
Rev.1.1, Jun.01.2004, page 4 of 19
M61531FP
Preliminary
Relationship between Data and Clock
H
LATCH SIGNAL D0 D1 D21 D22 D23 D0
DATA
L H
CLOCK
L H
LATCH
L
DATA signal is read at the rising edge of CLOCK. Serial data (D0 - D23) is loaded at the rising edge of the LA TCH signal.
Clock and Data Timings
tcr
75%
tSC
CLOCK
25% 25%
tr tWHC
tf tWLC
75% 25%
DATA
tr
tf tSD tHD tSL tr
tWHC tf
75% 25%
LATCH
Timing Definition of Digital Block
Item Clock cycle time Clock pulse width ("H" level) Clock pulse width ("L" level) Rising time of clock,data and latch Falling time of clock,data and latch Data setup time Data hold time Latch setup time Latch pulse width Clock setup time Symbol tcr tWHC tWLC tr tf tSD tHD tSL tWHL tSC Min. 4 1.6 1.6 -- -- 0.8 0.8 1 1.6 4 Typ. -- -- -- -- -- -- -- -- -- -- Max. -- -- -- 0.4 0.4 -- -- -- -- -- Unit s s s s s s s s s s
Rev.1.1, Jun.01.2004, page 5 of 19
D0a D1a D2a D3a D4a D5a D6a D7a D8a D9a D10a D11a D12a D13a D14a D15a D16a D17a D18a D19a D20a D21a D22 D23
M61531FP
Slot0 0 0 1 0
(1)Input Selector
(3) (3) (3) (3) (4) (5) REC REC REC REC Multi (2)Input ATT Output Output Output Output Input L/R VOL 1 2 3 4 Selector Input (6) Input Gain Control (7) Output Gain Control
(8) (9) INS10 All Ch /REC4 Output Selector Mute
(10) (5) Multi L/R Input VOL Mute Input
D0b D1b D2b D3b D4b D5b D6b D7b D8b D9b D10b D11b D12b D13b D14b D15b D16b D17b D18b D19b D20b D21b D22 D23
Slot1 (19)Rch Volume (19)Cch Volume 0 0 0
Data Control Specification
Rev.1.1, Jun.01.2004, page 6 of 19
(19)SRch Volume (19)SWch Volume 0 0 1 (11)Tone Treble (12) Tone Input ATT (13) (14) (15) (16) (17) Tone Loud/ Bypass Block Loud Balance L/R /Tone Position -ness Out Bypass 0 0 0 0 0 0 1 1
(19)Lch Volume
D0c D1c D2c D3c D4c D5c D6c D7c D8c D9c D10c D11c D12c D13c D14c D15c D16c D17c D18c D19c D20c D21c D22 D23
Slot2
(19)SLch Volume
D0d D1d D2d D3d D4d D5d D6d D7d D8d D9d D10d D11d D12d D13d D14d D15d D16d D17d D18d D19d D20d D21d D22 D23
Slot3
Initialize all data of the 4 formats when digital power supply (DVDD) turn on. Prohibit using except specified data code as follows.
(11)Tone Bass
Preliminary
M61531FP
Preliminary
Setting Code
(1) Input Selector
Setting All off IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 IN9 IN10 D0a 0 0 0 0 0 0 0 0 1 1 1 D1a 0 0 0 0 1 1 1 1 0 0 0 D2a 0 0 1 1 0 0 1 1 0 0 1 D3a 0 1 0 1 0 1 0 1 0 1 0
(2) Input ATT
Setting 0 dB -6 dB -12 dB -18 dB D4a 0 0 1 1 D5a 0 1 0 1
(3) REC Output
REC Output Setting Off On REC1 D6a 0 1 REC2 D7a 0 1 REC3 D8a 0 1 REC4 D9a 0 1
(4) Multi Input Selector (Except for L/R)
Setting Multi IN1 Multi IN2 D10a 0 1
(5) L/R VOL Input
Setting Bypass Multi IN1 Multi IN2 D11a 0 1 1 D19a 0 1
(6) Input Gain Control
Setting 0 dB +6 dB +12 dB +18 dB D12a 0 0 1 1 D13a 0 1 0 1
(7) Output Gain Control
Setting 0 dB +6 dB +12 dB +18 dB D14a 0 0 1 1 D15a 0 1 0 1
(8) IN10/REC4 Selector
Setting IN10 REC4 D16a 0 1
(9) All Ch Output Mute
Setting Mute off Mute on D17a 0 1
(10)Multi Input Mute (Except for L/R)
Setting Mute off Depend on (4) Multi Input Mute on 1 D18a 0
(12)Tone Input ATT
Setting 0 dB -6 dB -12 dB -18 dB D9d 0 0 1 1 D10d 0 1 0 1
(13)Bypass/Tone
Setting Bypass Tone D11d 0 1
Note: (//////) It's initial setting when power is turned on.
Rev.1.1, Jun.01.2004, page 7 of 19
M61531FP
Preliminary
Setting Code (cont.)
(11)Tone Control (Bass/Treble)
Bass ATT Setting +16 dB* +14 dB* +12 dB* +10 dB +8 dB +6 dB +4 dB +2 dB 0 -2 dB -4 dB -6 dB -8 dB -10 dB -12 dB* -14 dB* -16 dB* Treble D0d -- 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D1d D5d 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 D2d D6d 0 1 1 1 1 0 0 0 0 0 0 0 1 1 1 1 0 D3d D7d 0 1 1 0 0 1 1 0 0 0 1 1 0 0 1 1 0 D4d D8d 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
(14)Tone Block Position
Setting Before VOL After VOL D12d 0 1
(15)Loudness
Setting Off On D13d 0 1
(16)Loud/Balance
Setting Balance output Loudness D14d 0 1
(17)L/R Bypass
Setting Selector External IN D15d 0 1
Note: (//////) It's initial setting when power is turned on. * Only bypass setting
(18)6 channel Volume
Lch SLch Rch SRch Cch ATT 0 dB -1 dB -2 dB -3 dB -4 dB -5 dB -6 dB -7 dB -8 dB -9 dB -10 dB -11 dB -12 dB -13 dB -14 dB -15 dB SWch D0b D0c D7b D7c D14b D14c 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D1b D1c D8b D8c D15b D15c 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D2b D2c D9b D9c D16b D16c 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D3b D3c D10b D10c D17b D17c 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D4b D4c D11b D11c D18b D18c 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D5b D5c D12b D12c D19b D19c 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D6b D6c D13b D13c D20b D20c 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ATT -16 dB -17 dB -18 dB -19 dB -20 dB -21 dB -22 dB -23 dB -24 dB -25 dB -26 dB -27 dB -28 dB -29 dB -30 dB -31 dB Lch SLch Rch SRch Cch SWch D0b D0c D7b D7c D14b D14c 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D1b D1c D8b D8c D15b D15c 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D2b D2c D9b D9c D16b D16c 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D3b D3c D10b D10c D17b D17c 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D4b D4c D11b D11c D18b D18c 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D5b D5c D12b D12c D19b D19c 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D6b D6c D13b D13c D20b D20c 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Rev.1.1, Jun.01.2004, page 8 of 19
M61531FP
Preliminary
Setting Code (cont.)
(18)6 channel Volume (cont.)
Lch SLch Rch SRch Cch ATT -32 dB -33 dB -34 dB -35 dB -36 dB -37 dB -38 dB -39 dB -40 dB -41 dB -42 dB -43 dB -44 dB -45 dB -46 dB -47 dB -48 dB -49 dB -50 dB -51 dB -52 dB -53 dB -54 dB -55 dB -56 dB -57 dB -58 dB -59 dB -60 dB -61 dB -62 dB -63 dB -64 dB -65 dB -66 dB SWch D0b D0c D7b D7c D14b D14c 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 D1b D1c D8b D8c D15b D15c 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 D2b D2c D9b D9c D16b D16c 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 D3b D3c D10b D10c D17b D17c 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 D4b D4c D11b D11c D18b D18c 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 D5b D5c D12b D12c D19b D19c 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 D6b D6c D13b D13c D20b D20c 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 ATT -67 dB -68 dB -69 dB -70 dB -71 dB -72 dB -73 dB -74 dB -75 dB -76 dB -77 dB -78 dB -79 dB -80 dB -81 dB -82 dB -83 dB -84 dB -85 dB -86 dB -87 dB -88 dB -89 dB -90 dB -91 dB -92 dB -93 dB -94 dB -95 dB -96 dB -97 dB -98 dB -99 dB - dB Lch SLch Rch SRch Cch SWch D0b D0c D7b D7c D14b D14c 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D1b D1c D8b D8c D15b D15c 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 D2b D2c D9b D9c D16b D16c 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 D3b D3c D10b D10c D17b D17c 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 D4b D4c D11b D11c D18b D18c 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 D5b D5c D12b D12c D19b D19c 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 D6b D6c D13b D13c D20b D20c 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
Note: (//////) It's initial setting when power is turned on.
Rev.1.1, Jun.01.2004, page 9 of 19
M61531FP
Preliminary
Electrical Characteristics
Unless otherwise noted, Ta = 25C, AVCC = 7 V, AVEE = -7 V, DVDD = 3.3 V, f = 1 kHz, Volume = 0 dB, Input Selector = IN1, Input ATT = 0 dB, Input Gain Control = 0 dB, Output Gain Control = 0 dB, L/R Volume Input = Bypass, Multi Input Selector = Multi IN1, Tone = 0 dB, Tone Input ATT = 0 dB, Bypass/Tone = Bypass, Tone Position = Before Vol, Loudness = OFF, Loud/Balance = Balance, L/R Bypass = Selector (1) Power supply characteristics
Item Analog positive power circuit current Analog negative power circuit current Digital power circuit current Symbol AIcc AIee DIdd Min. -- -70 -- Typ. 50 -50 3 Max. 70 -- 6 Unit mA mA mA Test Condition With AVCC = 7 V and AVEE = -7 V, Pin31 pin current, when no signal is provided With AVCC = 7 V and AVEE = -7 V, Pin67 pin current, when no signal is provided With DVDD = 3.3 V, Pin30 pin current, when no signal is provided
(2) Input/Output characteristics (Over all)
Item Symbol Rin VOM Gv THD1 THD2 Min. 35 3.6 -2.0 -- -- -0.5 -- -- Vono
(VOL = 0 dB)
Typ. 47 4.2 0 0.005 0.03 0 1.5 9 2.5 12 5 -90 -90
Max. 65 -- 2.0 0.05 0.1 0.5 6 20 8 25 10 -70 -70
Unit k Vrms dB %
Test Condition 1 to 5, 65, 66, 68 to 80pin When each selector chooses a terminal concerned. (4, 5, 7, 8, 9, 10)pin input, (54, 47, 36, 35, 42, 41) pin output, THD = 1%, RL = 10 k, Output Gain Control = +12 dB setting (4, 5, 7, 8, 9, 10) pin input, (54, 47, 36, 35, 42, 41) pin output, Vi = 0.3 Vrms, FLAT (4, 5, 7, 8, 9, 10) pin input, (54, 47, 36, 35, 42, 41) pin output, BW:400 Hz to 30 kHz, f = 1kHz, Vo = 0.3 Vrms, RL = 10 k (4, 5, 7, 8, 9, 10) pin input, (54, 47, 36, 35, 42, 41) pin output, BW: 400 Hz to 30 kHz, f = 1 kHz, Vo = 2 Vrms, RL = 10 k
Input resistance Maximum output voltage Pass gain Total harmonic distortion
Balance of mutual channels Output noise voltage
CBAL Vono
(VOL = - dB)
dB Vrms
(4, 5) pin input, (54, 47) pin output, Vi = 0.3 Vrms, JIS-A JIS-A, (4, 5, 7, 8, 9, 10) pin:Rg = 0 , (54, 47, 36, 35, 42, 41) pin output, Volume = - dB setting JIS-A, (4, 5, 7, 8, 9, 10) pin:Rg = 0 , (54, 47, 36, 35, 42, 41) pin output, Volume = 0 dB setting Output gain control = 0 dB Output gain control = +12 dB Output gain control = 0 dB Output gain control = +12 dB
-- --
Vonobal
(Balance out)
-- -- --
JIS-A, (4, 5) pin:Rg = 0 , (14, 15, 17, 18) pin output dB (54, 47) pin output, Vo = 1 Vrms, Rg = 0 , RL = 10 k, JIS-A (35, 36, 41, 42, 47, 54) pin output, Vo = 1 Vrms, Rg = 0 , RL = 10 k, JIS-A, L/R VOL Input = Multi input dB (4, 5) pin input, (47, 54) pin output, Vo = 1 Vrms, Rg = 0 , RL = 10 k, JIS-A (7, 8, 9, 10, 11, 12) pin input, (35, 36, 41, 42, 47, 54) pin output, Vo = 1 Vrms, Rg = 0 , RL = 10 k, JIS-A, L/R VOL Input = Multi input
Input/Multi selector channel separation
CS1 CS2
Cross talk of mutual channels
CT1 (L/R) CT2 (Multi Input)
-- --
-90 -90
-70 -70
Rev.1.1, Jun.01.2004, page 10 of 19
M61531FP (3) 6 channel Volume characteristics
Item Maximum attenuation Volume gain gang error of mutual channels Symbol ATTmax Dvol Min. -- -0.5 Typ. -100 0 Max. -95 +0.5 Unit dB dB Test Condition
Preliminary
(35, 36, 41, 42, 47, 54) pin output, Vi = 2 Vrms, JIS-A, VOL = - (35, 36, 41, 42, 47, 54) pin output, Volume = 0 dB setting
(4) Tone control characteristics Unless otherwise noted, Bypass/Tone = Tone, (1, 2) PIN Input, (56, 45) PIN Output
Item Tone control voltage gain (Boost/Bass) Tone control voltage gain (Cut/Bass) Tone control voltage gain (Boost/Treble) Tone control voltage gain (Cut/Treble) Balance of mutual channels Symbol G(BASS)B G(BASS)C G(TRE)B G(TRE)C BALT Min. +14 -18 +8 -12 -2 Typ. +16 -16 +10 -10 0 Max. +18 -14 +12 -8 +2 Unit dB dB dB dB dB Test Condition f = 100 Hz, Bass +16 dB setting f = 100 Hz, Bass -16 dB setting f = 10 kHz, Treble +10 dB setting f = 10 kHz, Treble -10 dB setting Bass setting +16, -16 dB, Treble setting +10, -10 dB
Rev.1.1, Jun.01.2004, page 11 of 19
M61531FP
RECL3 RECL2 RECL1
Lch Balance ou t Rch Balance ou t
GND
16
30 31 67
DVDD AV CC AV EE -7V DGND +3.3V +7V 26
58 60 62 18 27 28 29
Tone Input ATT 0/-6/-12/-18dB Tone Block Position
-
47k
Loud /Balance Loudness tap Loudness tap
15 14 + -
17 +
CLOCK DATA LATCH L2
47k
47k
Loud /Balance
MCU I/F R3 from L1
53 52
47k
REC S W
L3 L1
47k
Internal Block Diagram
47k
51
47k
Rev.1.1, Jun.01.2004, page 12 of 19
Lch TONE BASS:16~+16dB TREBLE:-10~+10dB
Bypass/Tone
47k
L/R VOL Input
47k 47k
47k
Bypass
47k
47k
Lch Bypass Selector
Input ATT 0/-6/-12/-18dB 56
Input Gain Control
55 L3
Loudness tap
LOUT
54
Output Gain Control
0~-99dB,mute
47k 47k 47k 47k 47k
INL10 /RECL4 65 INL9 68 INL8 70 INL7 72 INL6 74 INL5 76 INL4 78 INL3 80 INL2 2 INL1 4 /EXT INL from L2 SLIN2 23 SLIN1 10 SRIN2 22 SRIN1 9
47k 47k
Multi Input Se lector
LI N2 20 LI N1 11
47k
0/+6/+12/+18dB
Lch Tone VOL 39
RECR3 RECR2 RECR1
Input S elector 59 61 63
47k 47k 47k
0/+6/+12/+18dB
Input Gain Control
40 SLch 0/+6/+12/+18dB VOL
0~-99dB,mute
41 44
Input Gain Control 0/+6/+12/+18dB
SLOUT
Output Gain Control 0/+6/+12/+18dB
Input S elector REC S W
43 SRch VOL 33
47k
Input Gain Control 0/+6/+12/+18dB 0~-99dB,mute
SWIN2 25 SWIN1 8 R1
42
SROUT
Output Gain Control 0/+6/+12/+18dB
66
47k
47k
34 SWch VOL
35
47k
Input Gain Control 0~-99dB,mute
SWOUT CIN2 24 CIN1 7
38
0/+6/+12/+18dB
47k
Output Gain Control 0/+6/+12/+18dB
47k
Input ATT 0/-6/-12/-18dB
RchBypass Selector
Bypass/Tone
47k
47k 47k
37 Cch VOL
0~-99dB,mute
36
COUT RIN2 21 RIN1 12
45
L/R VOL Input
Input Gain Control 0/+6/+12/+18dB
47k
47k
46 R3
Loudness tap
Output Gain Control 0/+6/+12/+18dB
Rch VOL
0~-99dB,mute
Bypass
47k
ROUT
47
Tone
47k
from R2 GND GND GND GND GND GND
6 13 19 32 57 64
INR10 /RECR4 INR9 INR8 INR7 INR6 INR5 INR4 INR3 INR2 INR1 /EXT INR
69 71 73 75 77 79 1 3 5
47k
Output Gain Control 0/+6/+12/+18dB
from R1
Tone Input ATT 0/-6/-12/-18dB Tone Block Position
Rch TONE BASS:16~+16dB TREBLE:-10~+10dB
Preliminary
48
49
50
R2
M61531FP
Preliminary
Application Block Diagram
[1]Before VOL se tting (D11d=1,D12d=0) Tone Block Position is electable. s
Balance Output (for ADC)
Loudne Tap ss
Input ATT (for ADC)
Multi Input PIN Multi Selector Volume
Input Selector
Input Gain Control
Output Gain Control
REC Outp ut *Rg=47k (Incase of when more than3ch is used at the same time.) *Rg=10k (Incase of when less than 2ch is used at the sa me time.)
Tone Input ATT
Tone Bass&Treble
[2]Af ter VOL setting (D11d=1,D12d=1)
Balance Output (for ADC)
Loudne Tap ss
Input ATT (for ADC)
Multi Input PIN Multi Selector Volume
Input Selector
Input Gain Control
Output Gain Control
REC Outp ut *Rg=47k (Incase of when more than3ch is used at the same time.) *Rg=10k (Incase of when less than 2ch is used at the same time.)
Tone Input ATT
Tone Bass&Treble
Rev.1.1, Jun.01.2004, page 13 of 19
M61531FP
Preliminary
Balance Output (for ADC)
[3] Bypass setting (D11d=0,D12d=*)
Loudne Tap ss
Input ATT (for ADC)
Multi Input PIN Multi Selector Volume
Input Selector
Input Gain Control
Output Gain Control
REC Outp ut * Rg=47k(In case of when more than 3ch is used at the same time.) * Rg=10k(In case of when less than 2ch is used at the same time.)
Tone Input ATT
Tone Bass&Treble
Rev.1.1, Jun.01.2004, page 14 of 19
M61531FP
Preliminary
(1)Bass
IN
OUT
[Desig ned Para mete r ] R1=4 .7 k, C1= 0. 22 F, C2=0. 047F Designed Parameter Gain Sett ing R3(k ) R2(k ) +16dB 3. 5 48.7 +14dB 5. 8 46.3 +12dB 8. 8 43.3 +10dB 12.6 39.5 +8dB 34.8 17.3 +6dB 28.8 23.3 +4dB 21.3 30.8 +2dB 11.9 40.2
R3
R2 1 f0 = 2 R1(R2+R3)C1C2 (Hz)
(R2+R3)R1C 1C2 C1 R1 Gv= 20 lo g R1(C1+C2)+(R2+R3)C1 R1(C1+C2)+R3C1 (d B) C2 Q= R1(C1+C2)+R3C1

[Des igned Para meter ] R1=4.7 k , C 1=0. 22F, C2=0.047F D gned Parameter esi Gain Sett ing R3(k ) R2(k ) -1 6dB 3. 5 48.7 -1 4dB 5. 8 46.3 -1 2dB 8. 8 43.3 -1 0dB 12.6 39.5 -8 dB 34.8 17.3 28.8 -6 dB 23.3 21.3 -4 dB 30.8 11.9 -2 dB 40.2
IN OUT
R2 R3
C2 f0 = 1 2 R1(R2+R3)C1C2 (Hz) R1
C1
(R2+R3)R1C1C2 Q= R1(C1+C2)+R3 C1 R1(C1+C2)+R3C1 R1(C1+C2 )+(R2+R3)C1
Gv= 20 log
(d B)
Rev.1.1, Jun.01.2004, page 15 of 19
M61531FP
Preliminary
(2)Treble
IN
OUT
[Desig ned Para mete r ] RC =2200pF R5 R4 Gain Settin g
Desi gned Parameter
Gv = 20log
RC
(R4+R5)2 + RC2 R4 2 +RC 2 (dB)
+10dB +8dB +6dB +4dB +2dB
R4(k ) R 5(k ) 7. 6 24.7 11.0 21.3 14.9 17.4 19.6 12.7 7. 0 25.3

IN
R5
Gv = 20log
R4 2+RC 2 (R4+R5)2 + RC2 (dB)
OUT
[Desig ned Para mete r ] RC =2200pF D gned Parameter esi Gain Setting R4(k ) R 5(k ) 7. 6 - 10dB 24.7 11.0 21.3 -8 dB 14.9 17.4 -6 dB 19.6 12.7 -4 dB 7. 0 25.3 -2 dB
R4
RC

+20dB
+10dB
Tone gain Gv (dB)
0dB
-10dB
-20dB 100 1k frequency f(Hz) 10k
Rev.1.1, Jun.01.2004, page 16 of 19
M61531FP Balance Output/Loudness Can be chose "Balance output" for external A/D converter or "Loudness" function by MCU command. "Balance output" and "Loudness" function can not be used at the same time. (1) Balance output The M61531FP has Balance output (L/R channel) for external A/D converter. Loud/Balance = Balance Output setting
Input gain control Tone amp
Preliminary
To loudness tap in volume block
B
L Loud/Balance Balance ou tput setting
In this setting, Loudness function is not provided. A/D converter
(2) Loudness The M61531FP has center tap type Loudness circuit in L/Rch volume block. Loud/Balance = Loudness setting
L/RchVolume (ATT=-16dB poi t) n connect to loudness tap
B Loud/Balance Loudness setting L
Tone output gain Gv (dB)

0
Output gain control
Loudness switch
-5dB
-10
-20
Loudness capacitor the frequ ency establishment
-30 100 1k 10k
In this settin Balance output function is not provided. g,
Frequency f(Hz)
Rev.1.1, Jun.01.2004, page 17 of 19
M61531FP
Preliminary
Application Example
C SW
AV CC DVDD 7V 3.3V
0.1u 0.1u 4.7u 4.7u 4.7u 4.7u 4.7u 100u
SWIN2 MCU
DGND
100u
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
4.7u
Cch
SWch
Output Gain Control
4.7u
SL SR
41
SLch
GND AVCC DVDD
25
42 SRch 43 44 45 46 47 48
Rch
Output Gain Control
24 23 22 21 20
2.2u 2.2u 2.2u 2.2u 2.2u
CIN2 SLIN2 SRIN2 RIN2 LI N2
Cch VOL
SWch VOL
MCU I/F
Input Gain Control
LA TCH DATA CLK
4.7u
Multi Input Selector
SLch VOL
Output Gain Control Input Gain Control Input Gain Control
SWch
4.7u
Cch
Multi Input Selector
4.7u
R
2200p
Output Gain Control
GND Rch
-1
19 18 17 16 15 +
-
SLch R2
Multi Input Selector
SRch VOL
Loudness tap
Loud /Balance
Loudness tap
0.047u 0.22u 0.22u 0.047u
4.7k
49 50
Tone(Bass,Treble)
Rch VOL
Output Gain Control
Bypass/Tone
R2
Input Gain Control
Tone Input ATT
SRch
Multi Input Selector L/R VOL Input
GND Lch
-1
4.7k
Rch
51 52 53 54 55 56 57 58 59
GND Lch
R1
Tone Block Po sition
L2
Loud /Balance
Loudness tap
14 13 12 11 10
2.2u 2.2u 2.2u 2.2u 2.2u 2.2u
R3 L3
Rch GND
L/R VOL Input
Tone Block Po sition
2200p
Lch
L
4.7u
L1
Output Gain Control
Tone Input ATT Bypass/Tone
Lch
Input Gain Control
Bypass/Tone
RIN1 LI N1 SLIN1 SRIN1 SWIN1 CIN1
INR1/ EXT INR INL1 / EXT INL INR2 INL2 INR3
L1 L3 Input ATT Lch
4.7u
Lch VOL
Loudness tap
L2
9 8
4.7u
4.7u
RECL1 RECR1 RECL2 RECR2 RECL3 RECR3
R3
R1
Bypass/Tone
7
GND
Input ATT Rch
4.7u
6 5
2.2u 2.2u 2.2u 2.2u 2.2u
4.7u
60 61 62 63
GND
Bypass Se lector
4.7u
4 3 2
Lch
Rch
4.7u
64
AVEE
1
69 70 71 72 73 74 75 76 77 78 79 80
65
66
67
2.2u
INL10 /RECL4
2.2u
INR10 /RECR4
AV EE -7V
68
2.2u
2.2u
2.2u
2.2u
2.2u
2.2u
2.2u
2.2u
2.2u
2.2u
2.2u
2.2u
2.2u
INR9
INL9
INR6
INL6
INR5
INL5
INR8
INR7
0.1u 100u
Rev.1.1, Jun.01.2004, page 18 of 19
INR4
INL8
INL7
INL4
INL3
ADC
Input Gain Control
+
-
M61531FP
80P6N-A
JEDEC Code -- MD Weight(g) 1.58 Lead Material Alloy 42
MMP
Plastic 80pin 14 x 20mm body QFP
EIAJ Package Code QFP80-P-1420-0.80
e
Package Dimensions
HD D
65 64
E
24 41
25
40
HE
A2
c
x
M
A1
Rev.1.1, Jun.01.2004, page 19 of 19
1
b2
I2 Recommended Mount Pad Symbol
A L1
A A1 A2 b c D E e HD HE L L1 x y L
Detail F
F e
b
y
b2 I2 MD ME
Dimension in Millimeters Min Nom Max 3.05 -- -- 0.1 0.2 0 2.8 -- -- 0.3 0.35 0.45 0.13 0.15 0.2 13.8 14.0 14.2 19.8 20.0 20.2 0.8 -- -- 16.5 16.8 17.1 22.5 22.8 23.1 0.4 0.6 0.8 1.4 -- -- -- -- 0.2 0.1 -- -- 0 10 -- 0.5 -- -- 1.3 -- -- 14.6 -- -- -- -- 20.6
ME
80
Preliminary
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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